diff --git a/Core/Inc/main.h b/Core/Inc/main.h index 2e48748..4ca0135 100644 --- a/Core/Inc/main.h +++ b/Core/Inc/main.h @@ -244,6 +244,126 @@ void Error_Handler(void); /* USER CODE BEGIN Private defines */ +#define LCD_RES_HIGH(void) GPIOA->BSRR=GPIO_BSRR_BS7 +#define LCD_RES_LOW(void) GPIOA->BSRR=GPIO_BSRR_BR7 + +#define LCD_CS_HIGH(void) GPIOC->BSRR=GPIO_BSRR_BS2 +#define LCD_CS_LOW(void) GPIOC->BSRR=GPIO_BSRR_BR2 + +#define LCD_DC_HIGH(void) GPIOD->BSRR=GPIO_BSRR_BS13 +#define LCD_DC_LOW(void) GPIOD->BSRR=GPIO_BSRR_BR13 + +#define ILI9341_HSYNC ((uint32_t)9) /* Horizontal synchronization */ +#define ILI9341_HBP ((uint32_t)29) /* Horizontal back porch */ +#define ILI9341_HFP ((uint32_t)2) /* Horizontal front porch */ +#define ILI9341_VSYNC ((uint32_t)1) /* Vertical synchronization */ +#define ILI9341_VBP ((uint32_t)3) /* Vertical back porch */ +#define ILI9341_VFP ((uint32_t)2) /* Vertical front porch */ + +/** + * @brief ILI9341 Registers + */ + +/* Level 1 Commands */ +/* Level 1 Commands */ +#define ILI9341_SWRESET 0x01U /* Software Reset */ +#define ILI9341_READ_DISPLAY_ID 0x04U /* Read display identification information */ +#define ILI9341_RDDST 0x09U /* Read Display Status */ +#define ILI9341_RDDPM 0x0AU /* Read Display Power Mode */ +#define ILI9341_RDDMADCTL 0x0BU /* Read Display MADCTL */ +#define ILI9341_RDDCOLMOD 0x0CU /* Read Display Pixel Format */ +#define ILI9341_RDDIM 0x0DU /* Read Display Image Format */ +#define ILI9341_RDDSM 0x0EU /* Read Display Signal Mode */ +#define ILI9341_RDDSDR 0x0FU /* Read Display Self-Diagnostic Result */ +#define ILI9341_SPLIN 0x10U /* Enter Sleep Mode */ +#define ILI9341_SLEEP_OUT 0x11U /* Sleep out register */ +#define ILI9341_PTLON 0x12U /* Partial Mode ON */ +#define ILI9341_NORMAL_MODE_ON 0x13U /* Normal Display Mode ON */ +#define ILI9341_DINVOFF 0x20U /* Display Inversion OFF */ +#define ILI9341_DINVON 0x21U /* Display Inversion ON */ +#define ILI9341_GAMMA 0x26U /* Gamma register */ +#define ILI9341_DISPLAY_OFF 0x28U /* Display off register */ +#define ILI9341_DISPLAY_ON 0x29U /* Display on register */ +#define ILI9341_CASET 0x2AU /* Column address register */ +#define ILI9341_RASET 0x2BU /* Page address register */ +#define ILI9341_GRAM 0x2CU /* GRAM register */ +#define ILI9341_RGBSET 0x2DU /* Color SET */ +#define ILI9341_RAMRD 0x2EU /* Memory Read */ +#define ILI9341_PLTAR 0x30U /* Partial Area */ +#define ILI9341_VSCRDEF 0x33U /* Vertical Scrolling Definition */ +#define ILI9341_TEOFF 0x34U /* Tearing Effect Line OFF */ +#define ILI9341_TEON 0x35U /* Tearing Effect Line ON */ +#define ILI9341_MAC 0x36U /* Memory Access Control register*/ +#define ILI9341_VSCRSADD 0x37U /* Vertical Scrolling Start Address */ +#define ILI9341_IDMOFF 0x38U /* Idle Mode OFF */ +#define ILI9341_IDMON 0x39U /* Idle Mode ON */ +#define ILI9341_PIXEL_FORMAT 0x3AU /* Pixel Format register */ +#define ILI9341_WRITE_MEM_CONTINUE 0x3CU /* Write Memory Continue */ +#define ILI9341_READ_MEM_CONTINUE 0x3EU /* Read Memory Continue */ +#define ILI9341_SET_TEAR_SCANLINE 0x44U /* Set Tear Scanline */ +#define ILI9341_GET_SCANLINE 0x45U /* Get Scanline */ +#define ILI9341_WDB 0x51U /* Write Brightness Display register */ +#define ILI9341_RDDISBV 0x52U /* Read Display Brightness */ +#define ILI9341_WCD 0x53U /* Write Control Display register*/ +#define ILI9341_RDCTRLD 0x54U /* Read CTRL Display */ +#define ILI9341_WRCABC 0x55U /* Write Content Adaptive Brightness Control */ +#define ILI9341_RDCABC 0x56U /* Read Content Adaptive Brightness Control */ +#define ILI9341_WRITE_CABC 0x5EU /* Write CABC Minimum Brightness */ +#define ILI9341_READ_CABC 0x5FU /* Read CABC Minimum Brightness */ +#define ILI9341_READ_ID1 0xDAU /* Read ID1 */ +#define ILI9341_READ_ID2 0xDBU /* Read ID2 */ +#define ILI9341_READ_ID3 0xDCU /* Read ID3 */ + +/* Level 2 Commands */ +#define ILI9341_RGB_INTERFACE 0xB0U /* RGB Interface Signal Control */ +#define ILI9341_FRMCTR1 0xB1U /* Frame Rate Control (In Normal Mode) */ +#define ILI9341_FRMCTR2 0xB2U /* Frame Rate Control (In Idle Mode) */ +#define ILI9341_FRMCTR3 0xB3U /* Frame Rate Control (In Partial Mode) */ +#define ILI9341_INVTR 0xB4U /* Display Inversion Control */ +#define ILI9341_BPC 0xB5U /* Blanking Porch Control register */ +#define ILI9341_DFC 0xB6U /* Display Function Control register */ +#define ILI9341_ETMOD 0xB7U /* Entry Mode Set */ +#define ILI9341_BACKLIGHT1 0xB8U /* Backlight Control 1 */ +#define ILI9341_BACKLIGHT2 0xB9U /* Backlight Control 2 */ +#define ILI9341_BACKLIGHT3 0xBAU /* Backlight Control 3 */ +#define ILI9341_BACKLIGHT4 0xBBU /* Backlight Control 4 */ +#define ILI9341_BACKLIGHT5 0xBCU /* Backlight Control 5 */ +#define ILI9341_BACKLIGHT7 0xBEU /* Backlight Control 7 */ +#define ILI9341_BACKLIGHT8 0xBFU /* Backlight Control 8 */ +#define ILI9341_POWER1 0xC0U /* Power Control 1 register */ +#define ILI9341_POWER2 0xC1U /* Power Control 2 register */ +#define ILI9341_VCOM1 0xC5U /* VCOM Control 1 register */ +#define ILI9341_VCOM2 0xC7U /* VCOM Control 2 register */ +#define ILI9341_NVMWR 0xD0U /* NV Memory Write */ +#define ILI9341_NVMPKEY 0xD1U /* NV Memory Protection Key */ +#define ILI9341_RDNVM 0xD2U /* NV Memory Status Read */ +#define ILI9341_READ_ID4 0xD3U /* Read ID4 */ +#define ILI9341_PGAMMA 0xE0U /* Positive Gamma Correction register */ +#define ILI9341_NGAMMA 0xE1U /* Negative Gamma Correction register */ +#define ILI9341_DGAMCTRL1 0xE2U /* Digital Gamma Control 1 */ +#define ILI9341_DGAMCTRL2 0xE3U /* Digital Gamma Control 2 */ +#define ILI9341_INTERFACE 0xF6U /* Interface control register */ + +/* Extend register commands */ +#define ILI9341_POWERA 0xCBU /* Power control A register */ +#define ILI9341_POWERB 0xCFU /* Power control B register */ +#define ILI9341_DTCA 0xE8U /* Driver timing control A */ +#define ILI9341_DTCB 0xEAU /* Driver timing control B */ +#define ILI9341_POWER_SEQ 0xEDU /* Power on sequence register */ +#define ILI9341_3GAMMA_EN 0xF2U /* 3 Gamma enable register */ +#define ILI9341_PRC 0xF7U /* Pump ratio control register */ + +#define MADCTL_MY 0x80 ///< Bottom to top +#define MADCTL_MX 0x40 ///< Right to left +#define MADCTL_MV 0x20 ///< Reverse Mode +#define MADCTL_ML 0x10 ///< LCD refresh Bottom to top +#define MADCTL_RGB 0x00 ///< Red-Green-Blue pixel order +#define MADCTL_BGR 0x08 ///< Blue-Green-Red pixel order +#define MADCTL_MH 0x04 ///< LCD refresh right to left + +/* Size of read registers */ +#define LCD_READ_ID4_SIZE 3 /* Size of Read ID4 */ + /* USER CODE END Private defines */ #ifdef __cplusplus diff --git a/Core/Src/main.c b/Core/Src/main.c index f9a1480..19711f9 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -20,8 +20,7 @@ #include "main.h" #include "cmsis_os.h" #include "stm32f4xx_hal_ltdc.h" -#include "stm32f4xx_hal_sdram.h" -#include "stm32f4xx_ll_fmc.h" +#include "stm32f4xx_hal_spi.h" #include "usb_host.h" /* Private includes ----------------------------------------------------------*/ @@ -88,6 +87,166 @@ void StartDefaultTask(void const * argument); /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ + +void LCD_Write_Cmd(uint8_t cmd) +{ + LCD_CS_LOW(); + LCD_DC_LOW(); + HAL_SPI_Transmit(&hspi5, &cmd, 1, 1000); + LCD_CS_HIGH(); +} + +void LCD_Write_Data (uint8_t data) +{ + LCD_CS_LOW(); + LCD_DC_HIGH(); + HAL_SPI_Transmit(&hspi5, &data, 1, 1000); + LCD_CS_HIGH(); +} + +//initialize the tft +void ILI9341_Init(void) +{ + LCD_RES_LOW(); + osDelay(50); + LCD_RES_HIGH(); + osDelay(20); + LCD_Write_Cmd(ILI9341_SWRESET); + osDelay(10); + LCD_Write_Cmd(ILI9341_POWERB); + osDelay(10); + LCD_Write_Data(0x00);; + LCD_Write_Data(0xD9); + LCD_Write_Data(0x30); + + + LCD_Write_Cmd(ILI9341_POWER_SEQ); + LCD_Write_Data(0x64); + LCD_Write_Data(0x03); + LCD_Write_Data(0X12); + LCD_Write_Data(0X81); + + + LCD_Write_Cmd(ILI9341_DTCA); + LCD_Write_Data(0x85); + LCD_Write_Data(0x10); + LCD_Write_Data(0x7A); + + + LCD_Write_Cmd(ILI9341_POWERA); + LCD_Write_Data(0x39); + LCD_Write_Data(0x2C); + LCD_Write_Data(0x00); + LCD_Write_Data(0x34); + LCD_Write_Data(0x02); + + + LCD_Write_Cmd(ILI9341_PRC); + LCD_Write_Data(0x20); + + + LCD_Write_Cmd(ILI9341_DTCB); + LCD_Write_Data(0x00); + LCD_Write_Data(0x00); + + + LCD_Write_Cmd(ILI9341_POWER1); + LCD_Write_Data(0x1B); + + + LCD_Write_Cmd(ILI9341_POWER2); + LCD_Write_Data(0x12); + + + LCD_Write_Cmd(ILI9341_VCOM1); + LCD_Write_Data(0x08); + LCD_Write_Data(0x26); + + + LCD_Write_Cmd(ILI9341_VCOM2); + LCD_Write_Data(0XB7); + + + + LCD_Write_Cmd(ILI9341_PIXEL_FORMAT); + LCD_Write_Data(0x55); //select RGB565 + + LCD_Write_Cmd(ILI9341_FRMCTR1); + LCD_Write_Data(0x00); + LCD_Write_Data(0x1B);//frame rate = 70 + + + LCD_Write_Cmd(ILI9341_DFC); // Display Function Control + LCD_Write_Data(0x0A); + LCD_Write_Data(0xA2); + + + LCD_Write_Cmd(ILI9341_3GAMMA_EN); // 3Gamma Function Disable + LCD_Write_Data(0x02); + + + LCD_Write_Cmd(ILI9341_GAMMA); + LCD_Write_Data(0x01); + + + LCD_Write_Cmd(ILI9341_PGAMMA); //Set Gamma + LCD_Write_Data(0x0F); + LCD_Write_Data(0x1D); + LCD_Write_Data(0x1A); + LCD_Write_Data(0x0A); + LCD_Write_Data(0x0D); + LCD_Write_Data(0x07); + LCD_Write_Data(0x49); + LCD_Write_Data(0X66); + LCD_Write_Data(0x3B); + LCD_Write_Data(0x07); + LCD_Write_Data(0x11); + LCD_Write_Data(0x01); + LCD_Write_Data(0x09); + LCD_Write_Data(0x05); + LCD_Write_Data(0x04); + + + LCD_Write_Cmd(ILI9341_NGAMMA); + LCD_Write_Data(0x00); + LCD_Write_Data(0x18); + LCD_Write_Data(0x1D); + LCD_Write_Data(0x02); + LCD_Write_Data(0x0F); + LCD_Write_Data(0x04); + LCD_Write_Data(0x36); + LCD_Write_Data(0x13); + LCD_Write_Data(0x4C); + LCD_Write_Data(0x07); + LCD_Write_Data(0x13); + LCD_Write_Data(0x0F); + LCD_Write_Data(0x2E); + LCD_Write_Data(0x2F); + LCD_Write_Data(0x05); + + LCD_Write_Cmd(ILI9341_RGB_INTERFACE); + LCD_Write_Data(0xC2); //Data is fetched during falling edge of DOTCLK + + + LCD_Write_Cmd(ILI9341_INTERFACE); + LCD_Write_Data(0x01); + LCD_Write_Data(0x00); + LCD_Write_Data(0x06); + + + LCD_Write_Cmd(ILI9341_MAC); // Memory Access Control command + LCD_Write_Data(MADCTL_BGR); + + + LCD_Write_Cmd(ILI9341_SLEEP_OUT); //Exit Sleep + osDelay(100); + LCD_Write_Cmd(ILI9341_DISPLAY_ON); //display on + osDelay(100); + +} + + + /* USER CODE END 0 */ /** @@ -193,7 +352,7 @@ void SystemClock_Config(void) RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 4; + RCC_OscInitStruct.PLL.PLLM = 16; RCC_OscInitStruct.PLL.PLLN = 72; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; RCC_OscInitStruct.PLL.PLLQ = 3; @@ -385,7 +544,10 @@ static void MX_LTDC_Init(void) Error_Handler(); } /* USER CODE BEGIN LTDC_Init 2 */ - + /* Enable Layer 1 */ + __HAL_LTDC_LAYER_ENABLE(&hltdc, 0); + /* Reload configuration immediately */ + __HAL_LTDC_RELOAD_IMMEDIATE_CONFIG(&hltdc); /* USER CODE END LTDC_Init 2 */ } @@ -694,17 +856,17 @@ static void MX_GPIO_Init(void) void StartDefaultTask(void const * argument) { /* init code for USB_HOST */ - MX_USB_HOST_Init(); /* USER CODE BEGIN 5 */ times_changed = 0; + ILI9341_Init(); + + /* Infinite loop */ for(;;) { DisplayTest(0xffff); - HAL_LTDC_Reload(&hltdc, LTDC_RELOAD_IMMEDIATE); osDelay(500); DisplayTest(0x0000); - HAL_LTDC_Reload(&hltdc, LTDC_RELOAD_IMMEDIATE); osDelay(500); } /* USER CODE END 5 */ diff --git a/Core/Src/stm32f4xx_hal_msp.c b/Core/Src/stm32f4xx_hal_msp.c index 7f0ca2f..50431d5 100644 --- a/Core/Src/stm32f4xx_hal_msp.c +++ b/Core/Src/stm32f4xx_hal_msp.c @@ -271,9 +271,9 @@ void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc) /** Initializes the peripherals clock */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC; - PeriphClkInitStruct.PLLSAI.PLLSAIN = 50; - PeriphClkInitStruct.PLLSAI.PLLSAIR = 2; - PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2; + PeriphClkInitStruct.PLLSAI.PLLSAIN = 192; + PeriphClkInitStruct.PLLSAI.PLLSAIR = 4; + PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_16; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { Error_Handler(); diff --git a/ui-library-playground.ioc b/ui-library-playground.ioc index 349a797..a9daeb9 100644 --- a/ui-library-playground.ioc +++ b/ui-library-playground.ioc @@ -886,29 +886,30 @@ RCC.HCLKFreq_Value=72000000 RCC.HSE_VALUE=8000000 RCC.HSI_VALUE=16000000 RCC.I2SClocksFreq_Value=192000000 -RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LCDTFTFreq_Value,LSE_VALUE,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,PLLSAIN,RTCFreq_Value,RTCHSEDivFreq_Value,SAI_AClocksFreq_Value,SAI_BClocksFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value,VCOSAIOutputFreq_ValueQ,VCOSAIOutputFreq_ValueR,VcooutputI2S,VcooutputI2SQ -RCC.LCDTFTFreq_Value=25000000 +RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LCDTFTFreq_Value,LSE_VALUE,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLN,PLLQ,PLLQCLKFreq_Value,PLLSAIDivR,PLLSAIN,PLLSAIR,RTCFreq_Value,RTCHSEDivFreq_Value,SAI_AClocksFreq_Value,SAI_BClocksFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value,VCOSAIOutputFreq_ValueQ,VCOSAIOutputFreq_ValueR,VcooutputI2S,VcooutputI2SQ +RCC.LCDTFTFreq_Value=6000000 RCC.LSE_VALUE=32768 RCC.LSI_VALUE=32000 RCC.MCO2PinFreq_Value=72000000 RCC.PLLCLKFreq_Value=72000000 -RCC.PLLM=4 RCC.PLLN=72 RCC.PLLQ=3 RCC.PLLQCLKFreq_Value=48000000 -RCC.PLLSAIN=50 +RCC.PLLSAIDivR=RCC_PLLSAIDIVR_16 +RCC.PLLSAIN=192 +RCC.PLLSAIR=4 RCC.RTCFreq_Value=32000 RCC.RTCHSEDivFreq_Value=4000000 -RCC.SAI_AClocksFreq_Value=25000000 -RCC.SAI_BClocksFreq_Value=25000000 +RCC.SAI_AClocksFreq_Value=96000000 +RCC.SAI_BClocksFreq_Value=96000000 RCC.SYSCLKFreq_VALUE=72000000 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK RCC.VCOI2SOutputFreq_Value=384000000 RCC.VCOInputFreq_Value=2000000 RCC.VCOOutputFreq_Value=144000000 -RCC.VCOSAIOutputFreq_Value=100000000 -RCC.VCOSAIOutputFreq_ValueQ=25000000 -RCC.VCOSAIOutputFreq_ValueR=50000000 +RCC.VCOSAIOutputFreq_Value=384000000 +RCC.VCOSAIOutputFreq_ValueQ=96000000 +RCC.VCOSAIOutputFreq_ValueR=96000000 RCC.VcooutputI2S=192000000 RCC.VcooutputI2SQ=192000000 SH.FMC_A0.0=FMC_A0,12b-sda1